SC/MP

National Semiconductor

Low cost microprocessor that has been designed to operate easily in multi-microprocessor configurations.
Most microprocessors are designed to always operate as bus master in any microcomputer system. SC/MP, in contrast, has the bus interface logic of a support device. it does not assume that it has any more right to a system bus than any other device. Bus request acknowledge logic coupled with bus access priority logic makes SC/MP the slave microprocessor of choice in any multi-microprocessor application.

Simple-to-use Cost-effectiv MicroProcessor
Silicon gate, P-channel Isoplanar LSI technology
Designed to fill the gap between four-bit CPUs (4004, 4040) and eight-bit microprocessors, the SC/MP features a 12-bit address bus, interfacing directly to 4 K bytes of standard memory. +5 V and -7 V volts power supply. Providing CMOS compatibility.
Disadvantage: SC/MP is much slower than CPUs in N-Channel MOS technology. The simplest instruction takes five microcycles, each 2 us long – making the SC/MP about as fast as the 8008. Nevertheless, SC/MP should be attractive in industrial controllers in which speed is not critical.
SC/MP is a direct descendant of PACE.

0.2 MHz