650x

Especially attractive for microcomputer applications.
The intention of designing the 6500 was to build a similar CPU to the popular 6800. The target has been met so Motorala complained the similarity of both chips. After redesign of the 6500 to the 6502 MOS was allowed to start with production although programmers were able to change their development work from 6800 to 6502 very easy. The most significant advantage has been the price ($ 25 instead of $ 175 for 6800). This was the reason why the 6502 has been chosen by Apple.
MOS has been incorporated in Commodore in 1977

N-Channel silicon gate depletion load MOS technology; on-chip clock version of the 6512adress 16 Bit (64 KByte); 56 instrucrions; adress mode: 12; 8-bit accumulator; +5 V single power supply; does not require externally generated clock inputs (on-chip clock oscillator); requiring only an external capacitor (or crystal) and a resistor for main timing, this CPU effectively requires less PC board area and saves on component cost. Similar in features to both the 6501 and 6800, it is attractive as a 6800 replacement in new designs; 70 types of instructions; 

6502: 1 MHz
6502A: 2 MHz
6502B: 3 MHz
6502C: 4 MHz

6501:The 6501 is pin-compatible with the 6800, differing only slightly in hardware
         interfacing. Its instruction set, while similar to the 6800, is not directly
         compatible.
65C02: CMOS technology; new instructions and two new adress modes;
6503: on-chip clock version of thr 6513; 28 pins
6504: on-chip clock version of the 6514; 28 pins
6505: on-chip clock version of the 6515; 28 pins
6506: on-chip clock version; 4K memory; IRQ; 28 pins
6507: reduced 6502 version with 13-bit address bus; no interrupts
6509: Addressing up to 1 MByte
6510: modified 6502; additional 8-Bit port to read data from external devices
6512: most like the 6800; 28 pins
6513: 4K memory with IRQ and NMI; 28 pins
6514: 8K memory with IRQ; 28 pins
6515: 4K memory with IRQ and RDY; 28 pins
6820: enhanced 6502 version from NEC; addressing up to 2 Mbyte;
7501: 6502 version from Commodore (6502: first digit plus 1, last digit minus 1)

6520: Peripheral Interface Adapter
6521: Peripheral Interface Adapter
6522: Peripheral Interface Adapter
6530: RAM, ROM, I/O and Internal Timer (picture)
6531: RAM, ROM, I/O and Counter / Timer
6532: RAM, ROM, I/O and Internal Timer
6534: ROM, I/O and Counter
6545: CRT Controller
6551: Asynchronous Communications Interface Adapter
6591: Mini-Floppy Disc Controller
6592: Dot-Matrix Printer Controller
6593: Mini-Floppy Disc Controller

KIM-1 microcomputer from the mid 1970s (revision B). The KIM-1 was the first computer developed by MOS (later taken over from Commodore). Intended to be a hobby computer for teaching a user to program in hexadecimal. The computer uses a MOS 6502 CPU. The 6502 operated in conjunction with two MOS 6530 array chips.
The KIM-1 has 1152 bytes of RAM, 2048 bytes of ROM and 30 I/O-lines. Some of these lines are used to steer six 7-segment LED-displays and others are used to read the little hexadecimal keyboard.
MOS 6502 CPU; 1.25 kilobytes of memory; machine Code, BASIC available; 2 - 44 pin edge connectors; 6 digit LED graphics, video monitor could be added for text only; KIM-1 was introduced 1976

6510 in CMOS technology