|
Z800x
|
| History |
The Z8000 was
an interesting model at that time; something difficult to work with but
able to address much more physical memory than the competitor models of
Intel and Motorola. This fact led to some successes in design. But again
Zilog was not in a position to give good support. This problem already
existed for the Z80. Compared with Intel, which had staff of about
10.000 persons and had works and sales departments all over the world
Zilog only consisted of several hundreds of employeees. In addition
Zilog decided that the Z8000 should not be software compatible with the
Z80. This was a enormous strategic mistake. Although the Z8000 had one
of the most elegant designs at that time it fell back in the competition
with Intel and Motorola.
|
|
8001
|
| Manufacturer |
Zilog |
|
|
| Category |
microprocessor,
segmented |
| Introduction |
1979 |
|
|
| Technology |
N-Channel silicon gate depletion load
technology; segmented version of Z8000 series; 48 pin DIP; adresses 8
MBytes of memory; two operating modes - system and normal - and the
distinction between code, data and stack spaces within each mode allows
memory extension up to 48 megabytes; it is available a companion
memory-management device Z8010;
|
Examples
Package
Comment
|
MME
UB 8001 C |
Zilog
Z8001 BPS |
 |
 |
| 48
pin CERDIP |
48
pin DIP |
| - |
- |
|
| Manufactured devices |
| |
Package |
Temperature
Range |
Clock |
| Z8001
B1 |
48 pin
DIP |
0° - +70
°C |
4 MHz |
| Z8001
B6 |
48 pin
DIP |
-40° -
+85 °C |
4 MHz |
| Z8001
D1 |
48 pin
CERDIP |
0° - +70
°C |
4 MHz |
| Z8001
D2 |
48 pin
CERDIP |
-55° -
+125 °C |
4 MHz |
| Z8001
D6 |
48 pin
CERDIP |
-40° -
+85 °C |
4 MHz |
| Z8001A
B1 |
48 pin
DIP |
0° - +70
°C |
6 MHz |
| Z8001A
B6 |
48 pin
DIP |
-40° -
+85 °C |
6 MHz |
| Z8001A
D1 |
48 pin
CERDIP |
0° - +70
°C |
6 MHz |
| Z8001A
D6 |
48 pin
CERDIP |
-40° -
+85 °C |
6 MHz |
| Z8001B
B1 |
48 pin
DIP |
0° - +70
°C |
10 MHz |
| Z8001B
B6 |
48 pin
DIP |
-40° -
+85 °C |
10 MHz |
| Z8001B
D1 |
48 pin
CERDIP |
0° - +70
°C |
10 MHz |
| Z8001B
D6 |
48 pin
CERDIP |
-40° -
+85 °C |
10 MHz |
|
| Second
source |
AMD,
MME, Signetics |
| |
|
|
8002
|
| Manufacturer |
Zilog |
|
|
| Category |
microprocessor,
non-segmented |
| Introduction |
1979 |
|
|
| Technology |
N-Channel silicon gate depletion load
technology; non segmented version of Z8000 series; therefore it does not
have segmented registers and can not use segmented addresses to address
memory; thus it can only address 64 KBytes of memory; simpler than Z8001; 40 pin
DIP; two operating modes - system and normal - and the distinction
between code, data and stack spaces within each mode allows memory
extension up to 384 KBytes;
|
Examples
Package
Comment
|
AMD
Z8002A-8DC |
AMD
AMZ8002DC |
MME
UB 8002 D |
Sharp
LH 8002 P |
 |
 |
 |
 |
40
pin CERDIP
gold top |
40
pin CERDIP
gold top |
40
pin DIP |
40
pin DIP |
| - |
- |
Eastern
(ex GDR) device |
- |
|
| Manufactured devices |
| |
Package |
Temperature
Range |
Clock |
| Z8002
B1 |
40 pin
DIP |
0° - +70
°C |
4 MHz |
| Z8002
B6 |
40 pin
DIP |
-40° -
+85 °C |
4 MHz |
| Z8002
D1 |
40 pin
CERDIP |
0° - +70
°C |
4 MHz |
| Z8002
D2 |
40 pin
CERDIP |
-55° -
+125 °C |
4 MHz |
| Z8002
D6 |
40 pin
CERDIP |
-40° -
+85 °C |
4 MHz |
| Z8002A
B1 |
40 pin
DIP |
0° - +70
°C |
6 MHz |
| Z8002A
B6 |
40 pin
DIP |
-40° -
+85 °C |
6 MHz |
| Z8002A
D1 |
40 pin
CERDIP |
0° - +70
°C |
6 MHz |
| Z8002A
D6 |
40 pin
CERDIP |
-40° -
+85 °C |
6 MHz |
| Z8002B
B1 |
40 pin
DIP |
0° - +70
°C |
10 MHz |
| Z8002B
B6 |
40 pin
DIP |
-40° -
+85 °C |
10 MHz |
| Z8002B
D1 |
40 pin
CERDIP |
0° - +70
°C |
10 MHz |
| Z8002B
D6 |
40 pin
CERDIP |
-40° -
+85 °C |
10 MHz |
|
| Second
source |
AMD,
MME, Signetics |
|
8003
|
| Manufacturer |
Zilog |
|
|
| Category |
vitual
memory processing unit (VMPU) |
| Introduction |
|
|
|
| Technology |
uses both segmented and non segmented
address spaces; interfaces with the entire Z800x family of support
components; binary compatible with other Z800x family microprocessors;
abort capability and test / set status available; 48 pin package
|
Manufactured
devices |
| |
Package |
Temperature
Range |
Clock |
| Z8003
B1 |
48 pin
DIP |
0° - +70
°C |
4 MHz |
| Z8003
B6 |
48 pin
DIP |
-40° -
+85 °C |
4 MHz |
| Z8003
D1 |
48 pin
CERDIP |
0° - +70
°C |
4 MHz |
| Z8003
D2 |
48 pin
CERDIP |
-55° -
+125 °C |
4 MHz |
| Z8003
D6 |
48 pin
CERDIP |
-40° -
+85 °C |
4 MHz |
| Z8003A
B1 |
48 pin
DIP |
0° - +70
°C |
6 MHz |
| Z8003A
B6 |
48 pin
DIP |
-40° -
+85 °C |
6 MHz |
| Z8003A
D1 |
48 pin
CERDIP |
0° - +70
°C |
6 MHz |
| Z8003A
D6 |
48 pin
CERDIP |
-40° -
+85 °C |
6 MHz |
| Z8003B
B1 |
48 pin
DIP |
0° - +70
°C |
10 MHz |
| Z8003B
B6 |
48 pin
DIP |
-40° -
+85 °C |
10 MHz |
| Z8003B
D1 |
48 pin
CERDIP |
0° - +70
°C |
10 MHz |
| Z8003B
D6 |
48 pin
CERDIP |
-40° -
+85 °C |
10 MHz |
|
| Second
source |
AMD,
Signetics, see also: eastern microprocessors |
| |
|
|
8004
|
| Manufacturer |
Zilog |
|
|
| Category |
virtual
memory processing unit (VMPU) |
| Introduction |
|
|
|
| Technology |
uses only non segmented address space;
interfaces with the entire Z800x family of support components; binary
compatible with other Z800x family microprocessors; abort capability and
test / set status available; 40 pin package
|
Manufactured
devices |
| |
Package |
Temperature
Range |
Clock |
| Z8004
B1 |
40 pin
DIP |
0° - +70
°C |
4 MHz |
| Z8004
B6 |
40 pin
DIP |
-40° -
+85 °C |
4 MHz |
| Z8004
D1 |
40 pin
CERDIP |
0° - +70
°C |
4 MHz |
| Z8004
D2 |
40 pin
CERDIP |
-55° -
+125 °C |
4 MHz |
| Z8004
D6 |
40 pin
CERDIP |
-40° -
+85 °C |
4 MHz |
| Z8004A
B1 |
40 pin
DIP |
0° - +70
°C |
6 MHz |
| Z8004A
B6 |
40 pin
DIP |
-40° -
+85 °C |
6 MHz |
| Z8004A
D1 |
40 pin
CERDIP |
0° - +70
°C |
6 MHz |
| Z8004A
D6 |
40 pin
CERDIP |
-40° -
+85 °C |
6 MHz |
| Z8004B
B1 |
40 pin
DIP |
0° - +70
°C |
10 MHz |
| Z8004B
B6 |
40 pin
DIP |
-40° -
+85 °C |
10 MHz |
| Z8004B
D1 |
40 pin
CERDIP |
0° - +70
°C |
10 MHz |
| Z8004B
D6 |
40 pin
CERDIP |
-40° -
+85 °C |
10 MHz |
|
| Second
source |
AMD,
MME, Signetics |
| Peripherals |
8065:
Burst Error Processor
8068: Data Cyphering Processor
8073: System Timing Controller
8103: Octal Bus Transceiver
8104: Octal Bus Transceiver
8107: Octal Bus Transceiver
8108: Octal Bus Transceiver
8010: Memory Management Unit
8016: Direct Memory Access Transfer Controller
8120: Octal register
8030: Serial Communications Controller (I/O)
8036: Counter Timer I/O
8038: First In / First Out I/O
8052: CRT Controller
8060: First In / First Out Buffer
8065: Burst Error Processor
8068: Data Ciphering Processor
8073: System Timing Controller
8090: Intelligent Peripheral Controller
8121: 8-bit Eqal-to Comparator
8127: Clock Generator
8133: Octal Latch
8136: 3 to 8 Decoder
8140: Octal Bus Driver
8144: Octal Bus Driver
8148: 3 to 8 Chip Select Decoder
8160: Error Detection and Correction Circuit
8161: Error Correction Multiple Bus Buffers
8162: Error Correction Multiple Bus Buffers
8163: Dynamic Memory Timing, Refresh and EDC Controller
8164: Dynamic Memory Controller
8165: Octal Dynamic Memory Drivers
8166: Octal Dynamic Memory Drivers
8173: Octal Latch
8877: Floppy Disc Controller
|