32016

National Semiconductor

The first chip in the 320xx series was originally called 16032 - later renamed 32016; predecessor of the Swordfish microprocessor.

XMOS technology; + 5 V power supply; designed for large addressing space (32 Mbyte) and high-level languages; internal 32-bit architecture; 16-bit data bus

10 MHz

NS32332: developed in 1986; high performance 32-bit CPU; successor of 32032

NS32532: High performance 32-bit CPU in M²CMOS and 175 pin PGA package;
               supports 4-Gbyte uniform address space on-chip memory management
               unit with 64-entry translation look-aside buffer. Incorporates 512-Byte
               on-chip instruction cache and 1024-Byte on-chip data cache and four
               stage instruction pipeline; high performance bus with separate 32-bit
               address and data lines with dynamic bus sizing and burst mode memory
               access; software compatible with the series 32000 family.

NS32081: Floating point unit; provides floating point instructions for single 32 bit
               and double (64 bit) precision; supports IEEE standard for binary floating
               point arithmetic; manufactured in XMOS 24 pin CERDIP package

NS32381: Second generation floating point unit; provides floating point instructions
                for single (32 bit) and double (64 bit) precision; supports IEEE standard
                for binary floating point arithmetic; manufactured in CMOS 68 pin PGA
                package; compatible with NS32016, NS23008, NS32C032, NS32032,
                NS32332 and NS32532 CPUs

NS32C201: Timing Control Unit; manufactured in CMOS technology with TTL
                  compatible inputs

NS32202: Interrupt Control Unit; minimizing the software and real-time overhead
               required to handle multi-level, prioritized interrupts; single ICU manages
               up to 16 interrupt sources and resolves interrupt priorities; expandable
               up to 256 interrupts using multiple ICUs